SiFive, a provider of commercial RISC-V processor IP cores, has raised $400 million in an oversubscribed Series G funding round led by Atreides Management. The company delivers customizable high-performance scalar, vector, and matrix cores for applications from edge to data centers. The capital will accelerate development of high-performance RISC-V solutions for data center and agentic AI workloads.
RISC-V Penetration Hits 25%
SiFive's raise aligns with RISC-V achieving 25% global processor market penetration. Competitors like Ventana Micro Systems were acquired by Qualcomm for their data center RISC-V CPUs, while Andes Technology secured partnerships for AI storage solutions. Codasip, offering customizable RISC-V IP, has raised $13M. SiFive differentiates through mature high-performance cores already integrated in hyperscaler silicon.
Arm Uncertainty Drives Open ISAs
Hyperscalers face uncertainty as Arm develops its own chips, pushing demand for open alternatives like RISC-V. Current proprietary ISAs create vendor lock-in and supply chain risks. SiFive addresses this with royalty-free, customizable IP that scales from embedded to data centers.
High-Performance Cores Target AI
SiFive's Performance Family, including P870-D with 256 cores, and Intelligence Family like XM Gen 2 accelerators, power agentic AI workloads. These cores integrate vector/matrix extensions for AI/ML efficiency. Unlike full-chip developers like Tenstorrent, SiFive focuses on licensable IP for SoC designers.
As Patrick Little, Chairman, President & CEO, noted:
"As the industry urgently evolves toward agentic AI, SiFive is doubling down on the data center."
Hyperscalers Validate P870-D XM
Products like P870-D and XM series are already shipping in customer silicon with hyperscalers. Recent NVIDIA NVLink Fusion integration enables coherent CPU-GPU connectivity for AI infrastructure. Partnerships with IAR and Quintauris expand automotive applications.
Crossover Investors Signal IPO Path
The round included NVIDIA, Apollo Global Management, Point72 Turion, and T. Rowe Price. NVIDIA's participation validates RISC-V as a complement to its GPUs in data centers. Crossover funds like Atreides and T. Rowe indicate pre-IPO growth capital.
RISC-V Market Scales to $9B
The RISC-V market stands at $1.7B in 2024, projected to reach $9B by 2030 at 33% CAGR. Another estimate pegs it at $3.34B with 34.1% CAGR. Trends show expansion into data centers amid AI demand and open ISA adoption.
Founders Invented RISC-V ISA
Co-founders Krste Asanović, Yunsup Lee, and Andrew Waterman invented the RISC-V ISA at UC Berkeley. Asanović serves as Chief Architect, Lee as CTO, and Waterman as Chief Engineer. CEO Patrick Little previously led eASIC to acquisition, adding scaling expertise.
Data Center Roadmap Accelerates
SiFive plans new CPU cores, accelerators, and system IP with software support for CUDA, Red Hat, and Ubuntu. CEO Little indicated this as the likely final round before IPO. Focus remains on hyperscale data centers for agentic AI.